wowza

Thank you!

That is good stuff, I still think the problem here is that they are trying to go in order, they need a true dynamic system, that has NO CPU, think more of a DPN, (distributed processing Net) I can wait for a condition to arise and then send a signal if it does, to a Cpu or gpu or motor etc.

So we have thousands of cores, that represent logic nodes, surrounding a cpu and gpu that organize and display the info,

another "trick" would be multiple copies of a hard drive, that gradually "Synch" this way you can have multiple saving streams,

with multiple output channels that are not CPU dependent you could process complex info on the fly, (I can directly fire a servo from a logic node)
So what needs to happen,
is the "static" cpu assigns tasks to the logic nodes, and then directs data streams, and when conditions meet criteria the node "fires"..... then the CPu can change tasks, or just log what fired the logic node...

They are talking about having FPGA cores on the die, which would be what you describe here. And most of their cores would be simple ones, with only a few beefy ones to orchestrate things, which also sounds similar. Incidentally, the whole thing is not that much of a stretch from AMD's current APUs.

Also interesting in this context are Mainframes and mainframe architecture. From that second link: "Today's IBM® mainframes have a central processor complex (CPC), which may contain several different types of z/Architecture® processors that can be used for slightly different purposes."